bitkeeper revision 1.1705.1.17 (42a9c29fxaDTWROFphY2UjU8IBagWw)

Fix NULL-handler check when propagating faults to guest kernels.
Signed-off-by: Keir Fraser <keir@xensource.com>

diff --git a/xen/arch/x86/x86_32/entry.S b/xen/arch/x86/x86_32/entry.S
index 8e7ecfe31decd7892f5ca529861027cc1eeb937b..475474b99ae959db786957670e8d5a7ecec896ab 100644 (file)
--- a/xen/arch/x86/x86_32/entry.S
+++ b/xen/arch/x86/x86_32/entry.S
@@ -176,10 +176,10 @@ vmx_process_softirqs:
 restore_all_guest:
         testl $X86_EFLAGS_VM,UREGS_eflags(%esp)
         jnz  restore_all_vm86
-FLT1:   mov UREGS_ds(%esp),%ds
-FLT2:   mov UREGS_es(%esp),%es
-FLT3:   mov UREGS_fs(%esp),%fs
-FLT4:   mov UREGS_gs(%esp),%gs
+FLT1:   mov  UREGS_ds(%esp),%ds
+FLT2:   mov  UREGS_es(%esp),%es
+FLT3:   mov  UREGS_fs(%esp),%fs
+FLT4:   mov  UREGS_gs(%esp),%gs
 restore_all_vm86:
         popl %ebx
         popl %ecx
@@ -306,7 +306,7 @@ create_bounce_frame:
         testl $(2|X86_EFLAGS_VM),%ecx
         jz   ring1 /* jump if returning to an existing ring-1 activation */
         movl VCPU_kernel_sp(%ebx),%esi
-FLT6:   mov VCPU_kernel_ss(%ebx),%gs
+FLT6:   mov  VCPU_kernel_ss(%ebx),%gs
         testl $X86_EFLAGS_VM,UREGS_eflags+4(%esp)
         jz   nvm86_1
         subl $16,%esi       /* push ES/DS/FS/GS (VM86 stack frame) */
@@ -326,13 +326,11 @@ FLT12:  movl %eax,%gs:4(%esi)
         jmp 1f
 ring1:  /* obtain ss/esp from oldss/oldesp -- a ring-1 activation exists */
         movl UREGS_esp+4(%esp),%esi
-FLT13:  mov UREGS_ss+4(%esp),%gs 
+FLT13:  mov  UREGS_ss+4(%esp),%gs 
 1:      /* Construct a stack frame: EFLAGS, CS/EIP */
         movb TRAPBOUNCE_flags(%edx),%cl
         subl $12,%esi
         movl UREGS_eip+4(%esp),%eax
-        test %eax,%eax
-        jz   domain_crash_synchronous
 FLT14:  movl %eax,%gs:(%esi) 
         movl VCPU_vcpu_info(%ebx),%eax
         pushl VCPUINFO_upcall_mask(%eax)
@@ -383,11 +381,13 @@ FLT26:  movl %eax,%gs:12(%esi)
 nvm86_3:/* Rewrite our stack frame and return to ring 1. */
         /* IA32 Ref. Vol. 3: TF, VM, RF and NT flags are cleared on trap. */
         andl $0xfffcbeff,UREGS_eflags+4(%esp)
-        mov %gs,UREGS_ss+4(%esp)
+        mov  %gs,UREGS_ss+4(%esp)
         movl %esi,UREGS_esp+4(%esp)
         movzwl TRAPBOUNCE_cs(%edx),%eax
         movl %eax,UREGS_cs+4(%esp)
         movl TRAPBOUNCE_eip(%edx),%eax
+        test %eax,%eax
+        jz   domain_crash_synchronous
         movl %eax,UREGS_eip+4(%esp)
         movb $0,TRAPBOUNCE_flags(%edx)
         ret
@@ -670,7 +670,7 @@ do_switch_vm86:
 
         # GS:ESI == Ring-1 stack activation
         movl UREGS_esp(%esp),%esi
-VFLT1:  mov UREGS_ss(%esp),%gs
+VFLT1:  mov  UREGS_ss(%esp),%gs
 
         # ES:EDI == Ring-0 stack activation
         leal UREGS_eip(%esp),%edi

diff --git a/xen/arch/x86/x86_64/entry.S b/xen/arch/x86/x86_64/entry.S
index e213a706619e1eb87add99f2bb5905f839f5cecc..b0f3ffb0fb894ff2332c8bab05ac8d03284e4e94 100644 (file)
--- a/xen/arch/x86/x86_64/entry.S
+++ b/xen/arch/x86/x86_64/entry.S
@@ -320,8 +320,6 @@ FLT4:   movq  %rax,16(%rsi)             # RFLAGS
         movw  UREGS_cs+8(%rsp),%ax      # Bits  0-15: CS
 FLT5:   movq  %rax,8(%rsi)              # CS/saved_upcall_mask
         movq  UREGS_rip+8(%rsp),%rax
-        testq %rax,%rax
-        jz    domain_crash_synchronous
 FLT6:   movq  %rax,(%rsi)               # RIP
         testb $TBF_EXCEPTION_ERRCODE,%cl
         jz    1f
@@ -357,6 +355,8 @@ FLT14:  movq  %rax,(%rsi)               # RCX
         movq  %rsi,UREGS_rsp+8(%rsp)
         movq  $__GUEST_CS,UREGS_cs+8(%rsp)
         movq  TRAPBOUNCE_eip(%rdx),%rax
+        testq %rax,%rax
+        jz    domain_crash_synchronous
         movq  %rax,UREGS_rip+8(%rsp)
         movb  $0,TRAPBOUNCE_flags(%rdx)
         ret